It is frequently desirable to integrate a Schottky diode and MOSFET into a common chip or die and package. For example, in a synchronous buck converter circuit, the low side FET requires a low Rdson, a low Vf (forward voltage drop) in the third quadrant and a low reverse recovery charge.
Such devices have been proposed in the past in both planar and trench topologies. For example, such a device is proposed by B. J. Baliga and Dev Alok Girdhar; Paradigm Shift In Planar Power MOSFET Technology, Power Electronics, page 24, November 2003. This device has the disadvantage of changed cell pitch and relatively poor use of silicon area.
It is also known to have laterally displaced MOSFET areas and Schottky areas, as in the IRF6691 device of International Rectifier, the assignee of the present application. This structure however, has a significant die area penalty because the drift region of the 2 devices is not shared.
Still another monolithic Schottky and MOSFET is shown in U.S. Pat. No. 6,987,305 (IR-2014).
It would be very desirable to provide a monolithic Schottky and FET which preserves die area and can be fabricated with a minimum change in process as compared to that used to make the MOSFET, and which employs a space saving termination structure.